Department of Information Technology,

University of Turku.

Joukahaisenkatu 3-5 B,

Turku 20520, Finland.

http://users.utu.fi/mofana

mofana@utu.fi

+358 (2) 333-7980

Office: ICT building, Room B5087

Mohammad Fattah

Home            

Publications

Academy

Curriculum Vitae

Tools

 

Publications

 

Please visit http://scholar.google.com/citations?user=4RpclBMAAAAJ for citations.

 

 

Copyright Notice

Leading Author

[1]    M Fattah, A Airola, R Ausavarungnirun, N Mirzaei, P Liljeberg, J Plosila, S Mohammadi, T Pahikkala, O Mutlu and H Tenhunen,

A Low-Overhead, Fully-Distributed, Guaranteed-Delivery Routing Algorithm for Faulty Network-on-Chips

In Networks-on-Chip (NOCS), 2015 9th ACM/IEEE International Symposium on, ACM, 2015.

One of the three Best Paper Award Candidates

[source code][slides]

[2]    M Fattah, M Palesi, P Liljeberg, J Plosila, and H Tenhunen,

SHiFA: System-level hierarchy in run-time fault-aware management of many-core systems

In Design Automation Conference (DAC), 2014 51st ACM/EDAC/IEEE, pp. 1-6. IEEE, 2014.

[3]    M Fattah, AM Rahmani, TC Xu, A Kanduri, P Liljeberg, J Plosila, and H Tenhunen,
Mixed-Criticality Run-Time Task Mapping for NoC-Based Many-Core Systems
In Parallel, Distributed and Network-Based Processing (PDP), 2014 22nd Euromicro International Conference on, pp. 458-465. IEEE, 2014.

[4]    M Fattah, P Liljeberg, J Plosila, and H Tenhunen,
Adjustable contiguity of run-time task allocation in networked many-core systems
In Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific, pp. 349-354. IEEE, 2014.

[5]    M Fattah, M Daneshtalab, P Liljeberg, and J Plosila,
Smart Hill Climbing for Agile Dynamic Mapping in Many-Core Systems
In Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE, pp. 1-6. IEEE, 2013.

[6]    M Fattah, M Ramirez, M Daneshtalab, P Liljeberg, and J Plosila,
CoNA: Dynamic application mapping for congestion reduction in many-core systems
In Computer Design (ICCD), 2012 IEEE 30th International Conference on, pp. 364-370. IEEE, 2012.

[7]    M Fattah, M Daneshtalab, P Liljeberg, and J Plosila,
Transport layer aware design of network interface in many-core systems
In Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2012 7th International Workshop on, pp. 1-7. IEEE, 2012.

[8]    M Fattah, M Daneshtalab, P Liljeberg, and J Plosila,
Exploration of MPSoC monitoring and management systems
In Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2011 6th International Workshop on, pp. 1-3. IEEE, 2011.

[9]    M Fattah, A Manian, A Rahimi, and S Mohammadi,
A High Throughput Low Power FIFO Used for GALS NoC Buffers
In 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 333-338. IEEE, 2010.

[10]M Fattah, SA Moghaddam, and S Mohammadi,
A Hazard-Free Delay-Insensitive 4-phase On-Chip Link Using MVCM Signaling
In Digital System Design, Architectures, Methods and Tools (DSD), 2009 12th Euromicro Conference on, pp. 61-66. IEEE, 2009.

 

Co-Author

[11] MH Haghbayan, AM Rahmani, M Fattah, P Liljeberg, J Plosila, Z Navabi, and H Tenhunen,
Power-Aware Online Testing of Manycore Systems in the Dark Silicon Era
In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015. IEEE, 2015.

[12] S Holmbacka, M Fattah, W Lund, AM Rahmani, S Lafond, and J Lilius,
A task migration mechanism for distributed many-core operating systems
The Journal of Supercomputing 68, no. 3 (2014): 1141-1162.

[13] I Tcarenko, M Fattah, P Liljeberg, J Plosila, and H Tenhunen,
Multi rectangle modeling approach for application mapping on a many-core system
In Parallel, Distributed and Network-Based Processing (PDP), 2014 22nd Euromicro International Conference on, pp. 452-457. IEEE, 2014.

[14] KR Vaddina, AM Rahmani, M Fattah, P Liljeberg, and J Plosila,
Design space exploration of thermal-aware many-core systems
Journal of Systems Architecture 59, no. 10 (2013): 1197-1213.

[15] MA Rahimian, S Mohammadi, and M Fattah,
A high-throughput, metastability-free GALS channel based on pausible clock method
In Quality Electronic Design (ASQED), 2010 2nd Asia Symposium on, pp. 294-300. IEEE, 2010.Best paper awarded.

[16] A Rahimi, ME Salehi, M Fattah, and S Mohammadi,
History-based dynamic voltage scaling with few number of voltage modes for GALS NoC
In Future Information Technology (FutureTech), 2010 5th International Conference on, pp. 1-6. IEEE, 2010.

 

 

 

 

 

 

 

 

 

 

 

Copyright Notice:

Permission to make digital/hard copy of all or part of any of the following publications and technical reports for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage. These publications are covered by copyright of the authors and publishing agencies.